The inputs from the switches (NUM1 and NUM2) are inverted before doing the addition. In the above code, the inputs are initialized to 11111b because they will be inverted to 00000b by the code at the bottom of the ARCHITECTURE implementation. compensate for inverting inputs and outputs Signal X : STD_LOGIC_VECTOR (4 downto 0) Signal B : STD_LOGIC_VECTOR (4 downto 0) Signal A : STD_LOGIC_VECTOR (4 downto 0) NUM2 : in STD_LOGIC_VECTOR (4 downto 0) := "11111" Īrchitecture Behavioral of binary_4_bit_adder2 is Port ( NUM1 : in STD_LOGIC_VECTOR (4 downto 0) := "11111" To implement the above code on the home built CPLD board, we need to compensate for the inverting inputs and outputs connected to the switches and LEDs by inverting all inputs and outputs: The two input vectors are initialized with a value of 00000b so that the MSB is always 0.
The code makes all the vectors to be 5 bits wide. SUM : out STD_LOGIC_VECTOR (4 downto 0)) Īrchitecture Behavioral of binary_4_bit_adder_top is Port ( NUM1 : in STD_LOGIC_VECTOR (4 downto 0) := "00000" This code shows how to implement the adder in VHDL: The first way of solving the problem of adding two 4-bit numbers and displaying the 5-bit result is to make the two 4-bit input numbers 5 bits in length, but keep the MSB of each number at 0. We will now look at two ways of implementing the same 4-bit binary adder and solve the problem of adding two 4-bit numbers and displaying the 5-bit result. In other words, even if the size of the sum vector is 5 bits, a 4 bit sum will be placed in it. The only problem with adding two 4 bit numbers in VHDL and then putting the result in a 5 bit vector is that the highest bit (or carry) will be truncated. So the vector used for our sum needs to be 5 bits in length (4 downto 0). The biggest output number (sum) generated by adding two 4-bit numbers together will be 1111b + 1111b = 11110b.
So the size of these numbers will be 4 bits each (3 downto 0). We will be using two 4-bit inputs connected to 4 switches each as our numbers that will be added together. This enables us to use inputs connected to switches and outputs connected to LEDs of the STD_LOGIC_VECTOR type defined in the Ports section of the ENTITY part of the VHDL.Īdding two numbers in the ARCHITECTURE part of the VHDL is as simple as this: Can't see the video? View on YouTube → Designing the Adderįrom the previous tutorial, we know that we can add two numbers together that are of the STD_LOGIC_VECTOR data type if we use the STD_LOGIC_SIGNED or the STD_LOGIC_UNSIGNED package from the IEEE library, e.g.:
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